how to constraint the gated clock in the Timequest？

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when a or b changed, the "out" must flip,i don't know how to achive it except the way i posted.

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The behaviour is different, also without timing violations, cause it's an AND operation. So I don't know, if you intend the above coded or the descripted behaviour.

If a and b aren't too fast, synchronous processing based on sufficient fast system clock would be my favourite solution. Of course, an exact behavioural specification, also considering possible overlappping of both signals, must exist.