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Hm. I'm not sure, if this configuration is supported by indirect JTAG programming. Did you find any hints in the device manual?
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I did like this on my another board. But, there is only one FPGA in the JTAG chain.
There two FPGAs on current board's jtag chain with one EPCS device. It seems the jtag detect 2 hardware on the chain when downloading JIC file thru jtag. So the programmer would give out the error information if i downloaded using the converted JIC file as my previous post's settings.
These 2 FPGAs share one EPCS, so do i need to set these two device as flash loader? But the converter only permit adding single flash loader.
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