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Altera_Forum's avatar
Altera_Forum
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12 years ago

how to compile 3 vhdl program to make 1 project and compile it into flex10k up2 board

hi, i have 3 vhdl file..its all my project file..how do i compile it and load it into the board because when i compile it showing top level entity undefined..im using quartus II 8.1..help me pleasee....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I don't know what else you need, the link on Altera's website is the simplest way to explain how to regroup several components in a top level file.