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Altera_Forum
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17 years ago

How to choose which PLL to use ?

Hello We have developed a prototype which uses a stratixIII ep3sl50f780c3, but because of a layout problem in PLL powering, only pll TOP1 can be used. The problem is that the program uses ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Yes, location assignment for PLLs in Assignment Editor works, and seems to be necessary in some cases, where the compiler/fitter apparently isn't able to select the correct PLL automaticly, e. g. to drive a dedicated clock output. Here an example for a PLL component instantiated in a design entity timing, instance name pll1. 

set_location_assignment PLL_3 -to "timing:pll1|altpll:altpll_component|altpll_mke1:auto_generated"

The PLL naming scheme for your device (legal assignments) can be seen in Assignment Editor interactive entry, or learnt from the Quartus report resource section.