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Altera_Forum
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16 years ago

How to check signal waveform.

I have this VHDL code within my architecture:

architecture first of butterfly8 is

signal butterfly8_r_Z1, butterfly8_r_Z2, butterfly8_r_Z3, butterfly8_r_Z4: std_logic_vector(31 downto 0);

I know that I can use Vector Waveform File to monitor my waveform of INPUT and OUTPUT pins. Would it be possible to monitor my signal, such as butterfly8_r_Z1 in the architecture? If so, how to do it? Thanks

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    well from your tests it appears that you cannot use Virtual Pins in Web Edition. i don't have that version installed so i can't confirm.

    that's right, you'll save some time without running the full compilation/Fitter too. ;)