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NuvKFC's avatar
NuvKFC
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1 year ago

How to apply set_disable_timing SDC command before synthesis?

I have a path, Cell|in to Cell|out, want to disable by using set_disable_timing like follows. set_disable_timing -from dataa to combout Cell After Fitter, I can find the signal in on the dataa, and...
Hdl
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
1 year ago

Hi,


After full compilation, put the respective node name in your case "cell|datac" to the sdc command set_disable_timing. Then re-run the compilation again to load sdc file, does it helps?


Thanks,

Regards,

Sheng


NuvKFC's avatar
NuvKFC
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1 year ago

Compiler twice!

I get it.


Maybe it can work. I think it should work.

Thank you, ShengN, very, very, much.