How to achieve the global reset function with the modelsim？

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if you enable the option bring out device-wide set/reset signals as ports, when you start test bench template writer,the generated test bench will add the "devclrn","devpor" in the test bench port map

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I think this is only for gate-level simulation, not for RTL level simulation. If you want to perform gate-level simulation, then I understand that would work. Most people use RTL-level simulation only, rarely gate-level.