Forum Discussion
Altera_Forum
Honored Contributor
17 years agoI don't think you can simulate this with ModelSim, at least not when performing an RTL level simulation.
The only way that I can see to do that, would be to add in the HDL code, an async clear to all the registers you are using. Take this async clr signal to the top level, and makes your testbench assert it as the device-wide reset. If you are already using some other async reset signal, combine both the local and wide reset as needed.