Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

How good is the inferred multiplier?

I am working with a previous developers verilog code set and looking for places to improve speed/area within their design. The majority of their development is behavioral, including one such statemen...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Inferring multiupliers is usually fine, aslong as you stay within the hardware limits (which for all Altera FPGAs is 18 bits per input - you can do up to 36 bits per inputs but you'll see your multipliers dissapear quite quickly)

It should pick up registers from the code that are contained inside the DSP slice too.