Honored Contributor
Honored ContributorThank you very much for the reply.
I just moved from Xilinx hls to Altera OpenCL. And I got stuck by the problem. --- Quote Start --- If you need a shared buffer that is too big to fit on-chip, you can use this design because here, the shared buffer is stored in global memory. If, however, you can get the job done with a small buffer and the latency between the writes from producer and reads from consumer is small, then a standard on-chip channel can do the job just fine. Yes, you can use non-blocking channels. These channels provide a flag using which you can determine if the non-blocking read/write has been successful or not. You can wrap your channel operation in a while(1) loop and use the flag, or even the data received from channel, to break out of the loop. You can find multiple basic examples in Altera's documents.. --- Quote End --- Yes, I did something similar. I inserted an END_OF_FLAG in the data stream. So I can use the END_OF_FLAG to decide if it is end of the processing. It works when the array size is small. it stalls when the array size is larger than a number around 300000~40000 on both simulation and implementation. I will double check today and post the code next time. Maybe I missed something critical. By the way, are you referring to the basic examples in this link? https://www.altera.com/products/design-software/embedded-software-developers/opencl/developer-zone.html The four basic examples are: Hello world, vector addition, multi-thread vector operation (C = A + B, C= A * B), OpenCL library (wrapping RTL design with OpenCL). It seems none of them have "un-deterministic" amount of communication between kernels, as they are working on regular data. If you happen to know the exact example, could you give me a clue... Really appreciated. --- Quote Start --- Similar to above, you can also use non-blocking channels with this type of design where the shared buffer is in global memory. --- Quote End --- Again thank you for the reply.
