How do I split a bus into individual signal lines?

I'm actually an embedded software engineer so any hardware design is a plus and not usually a requirement. In any case, I would disagree about the version control on schematics because they are just text files and you can look at them using Notepad. I wouldn't recommend editing them that way, but any text file can be added to a version control system. However, if you are talking about a system that highlights the differences in a graphical format, then that's a different matter.

I first did FPGA's in the late 90's using Xilinx. HDL was in its infancy back then and usually cost a lot extra since it was an add-on to the main license (which wasn't free back then). The lead EE where I worked switched my design to Altera (I'm software), but I've never used Altera myself until now. We used Flex 10K's on our production boards back then.

I'll probably start working with HDL at some point, but right now I'm sticking with what I know. I am getting fair at reading it, but writing it is more difficult.

I think any design can be messed up by someone trying to be clever with the design. I make schematics the same way I write code - in modules with no implicit linkage to anything else. The only exception is Gnd and Vcc. If there is no pin, there is no connection. I don't use named wires for the reasons you mentioned.

The HDL code that the other guy wrote who did the same project seemed sloppy, but since I'm not a verilog expert, I can't say for sure. In my schematic design, I created a single main counter/divider for all the little clocks that are used in the design. In his HDL design, he just passes the main 48M clock to everything and all the circuits just have their own private 32 bit dividers to get the frequency they want. It doesn't seem all that efficient, but then again, you never know how the optimizer is going to handle it.

So for right now, I picked up a Cycone IV E board and am playing with it. I'm not sure how far 6000 LE's will go, but the ultimate goal is to make an IBM PC VGA compatible controller. Its actually rather complicated considering all the different video modes and that they all work differently. Too complex for TTL logic. If it was just plain jane VGA, I could just do that with a PIC or AVR or something.

Anyhow, right now I'm just learning the basics of the Altera software.