Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

How create an alias name for an output from derive_pll_clocks in sdc file?

In the sdc file I include

derive_pll_clocks

This generates some clock names which are very long and difficult to read. As this will be used in may subsequent expressions for constraining I want a short-hand version.

what is the best way to create a short named alias for such derived clock? Would it work using something like?

set shortclock inst|.....|divclk

Example:

derive_pll_clocks #This generates clock named like this...

inst_clock_in|clock_gen_inst|altera_pll_i|general[1].gpll~pll_output_counter|divclk

set myshorthandclock inst_clock_in|clock_gen_inst|altera_pll_i|general[1].gpll~pll_output_counter|divclk

Edit: using set command above has definitely the drawback that the short-hand clock name is not appearing in the timing_analyzer reports. So still looking for better ways.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    You could use the " -use_net_name" option. The clock names are still long, but at least better to read. I am also using the "set" approach.

    Looking for better ways too.