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Altera_Forum
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14 years ago

How can i optimize the interconnect between BRAM and logic element

Hi, all I have build a NiosII processor with SOPC tool and find that the utilization of BRAM is not efficient. My target device is EC3C25 and its BRAM has 608256Bits, But I can use about 53%. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks thepancake for your reply, Just as your inferred, I really Build a on-chip memory by BRAM. For this case, Could you give me a good solution? Thanks again.