How can I know what compiled libraries needed for my design simulation?

The key commands you need are:

vcom/vlog <somefile> -- VHDL/Verilog compile command. Will by default compile into the work library, but using the -work option you can chose what library to compile into

vsim <my_design_unit> -- starts the simulation of the design

run X ns -- run simulation for X ns (-all option just runs forever until testbench stops)

vlib <some_library> -- creates a library

vmap <some_library> <libary_directory> -- maps a libaray to the specified directory

do <somefile> -- runs a tcl script

Thats about all the commands I use. I use the gui for adding waves to a wave window then save it to some .do file that I can then just run later.