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Altera_Forum's avatar
Altera_Forum
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12 years ago

How about a verilog case statement that covers a range?

How about a verilog case statement that covers a range? e.g. : case(xcount) begin 1-100 : junk<=1; 101 : junk<=2; 102-200 : junk<=3; endcase
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Yes. Hopefully if more people ask for it, it will become more widely supported.

To code this in Verilog, you could create an in-between function or macro 

function reg inbetween(input  low, value, high); 
begin
  inbetween = value >= low && value <= high;
end
endfunction
case (1);
  inbetween(1,xcount,100): junk<=1;
  inbetween(101,xcount,101): junk<=2;
  inbetween(102,xcount,200): junk<=3;
endcase