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The alternative is this:
declare out1_int and out2_int as signals. do your read/drive then wire up out1 port to out1_int...
You now can see what buffer is doing, it is meant to bypass the double work but causes confusion since it is meant to be output only (not input) but that can be read internally ???
Future vhdl is meant to allow reading output ports without declaring them as buffer.
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I was actually afraid you were going to suggest this route - it means more leg work. Just a couple more steps mind you, but more steps none the less. I'll go this route from now on.
Thanks again.
Triston
Honored Contributor
