Hold Violation inside ram_block - what is going on?

Hi mmeyers,

My issue is now resolved, unfortunately I cannot say for sure if I solved it. One thing I did was to split the very wide FIFO into a number of smaller FIFOs. This was because the output of the FIFO was being routed over a very large area by necessity (it was driving a set of transceivers which are far from eachother) and splitting into multiple FIFOs allowed different memory blocks closer to each transceiver to be utilised. I can't remember though if it met timing right after this, or after upgrading Quartus which I also did.

I can say though that it is not a false positive. I ran my (failed) design anyway and it worked - but only when the chip was within a limited range of temperatures. Outside this I would get data corruption.

Good luck (and please post back if you find the actual cause, I would really like to know what it is!)