HLS i++ Compiling Project With GTest

Hi,

May I know if you have been able to execute some of the example codes provided with HLS installation ?

Located in <hls_install directory>/examples/

Secondly make sure you have updated your GCC version 5.4.0 as mentioned in Getting stater guide.

What is the Gtest ? also please elaborate on "I have projects executing successfully using i++ or gtest individually, but when I try to use both in the same project, I run into the following errors:" ?

Thanks,

Arslan

Hello Arslan, I apologize for the delay in my response. I have not had much time to work on this project in the past week. I actually determined the cause of the error I was running into and fixed it this morning.

I plan to spend time more rigorously testing that I have everything running properly and then writing some documentation detailing my setup. I will post that here when I have that finished.

GTest, or GoogleTest, is a publicly available testing framework made by Google for C++. I've used it in the past with g++, but now I wish to use it in my projects with the HLS Compiler to create unit tests.

Thank you and have a nice day, Alex

Hello again, I have finally had time to do some more testing and debugging. Unfortunately, my claim that it works perfectly is not correct. My projects appear to run properly when i++ is run with –march=”x86-64” but not with any FPGA architecture. This somewhat surprised me because I thought it would behave the same for the parts of the code that are not part of a component function.

I included my example projects in the tar file and a partially completed tutorial pdf (please excuse the lack of polish since the tutorial is not my concern right now). All of the code is well commented and not very large.

To recap, my goal is to have a simple project to showcase how gtest and cmake could work with with the i++ compiler.

I would appreciate it if someone who knows more about what i++ does behind the scenes could shed some light on what is happening. I tried to document in the tutorial everything necessary to duplicate my setup. I believe that the issue is that libstdc++ is not linked against properly, or some such thing. The funky installation of the gcc 5.4.0 that intelFPGA recommends could also have something to do with that.

(Note this is conjecture that doesn’t have bulletproof reasoning because my understanding of the situation is a little shody.)

Nonetheless, here is some of my justification for my thoughts:

This is my output from “cmake3 ..” It confuses me that the CXX identification is Clang and not g++. I worry this may actually be the culprit, but I’m not entirely sure how to test that at the moment.

cmake3 ..

-- The C compiler identification is GNU 4.8.5

-- The CXX compiler identification is Clang 6.0.1 <===========================

-- Check for working C compiler: /bin/cc

-- Check for working C compiler: /bin/cc -- works

-- Detecting C compiler ABI info

-- Detecting C compiler ABI info - done

-- Detecting C compile features

-- Detecting C compile features - done

-- Check for working CXX compiler: /…/intelFPGA_pro/18.1/hls/bin/i++

-- Check for working CXX compiler: /…/intelFPGA_pro/18.1/hls/bin/i++ -- works

-- Detecting CXX compiler ABI info

-- Detecting CXX compiler ABI info - done

-- Detecting CXX compile features

-- Detecting CXX compile features – failed <===============================

-- Found GTest: /usr/lib64/libgtest.so

-- Configuring done

-- Generating done

This is my output from running make afterwards:

LMemSplit: Unable to resolve split destination type on:

_ZTVN10__cxxabiv120__si_class_type_infoE

Compiler Error: Cannot resolve destination address space through pointer indirection.

HLS Main Optimizer FAILED.

make[2]: *** [x86] Error 1

make[1]: *** [CMakeFiles/x86.dir/all] Error 2

make: *** [all] Error 2

“Researching” on stack overflow, this _ZTVN10__cxxabiv120__si_class_type_infoE is what I’ve based my assumptions on.

I’ve found that errors involving this string tend to involve not linking properly to “libstdc++” I tried to explicitly link to the appropriate shared library in the gcc 5.4.0 installation, but I did not have much luck with this.

This link gave me some useful information about what the above gibberish is actually referring to:

http://refspecs.linuxfoundation.org/LSB_3.1.0/LSB-CXX-generic/LSB-CXX-generic/libstdcxx-ddefs.html

It appears that intelFPGA decided uploading multiple files in one post was not a feature worth having, hence this post:

The error message you are getting seems to be coming from the HLS compiler, likely because it is running into some code that it cannot map to FPGA hardware. Are you sure this is not the reason for the compilation failure? Just because the code compiles in x86-64 mode does not mean it can be mapped to FPGA hardware. The HLS compiler has many limitations, some of which are mentioned in Intel High Level Synthesis Compiler User Guide, Appendix A.