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Altera_Forum's avatar
Altera_Forum
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14 years ago

Hierarchical design with Qsys and interrupts

Hi,

I am trying to setup a hierarchical design with Qsys. However i am having troubles with interrupts senders and receivers between the various subsystems.

The Qsys interconnect chapter on page 7-27 of the Quartus 11.0 Volume 1 handbook shows an example of Qsys IRQ bridge applications which seems to address my problem.

However, adding an IRQ Bridge in my CPU subsystem does not show up as an interrupt receiver input when instantiating the cpu subsystem on my toplevel qsys design.

It is easy to export other signals as conduit interfaces in Qsys but for interrupts this seem to be very unclear.

Any help?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    I found it. You need to enable "all interfaces" under the filter selection context menu option when you right click on a component in the System Contents tab.

    Then you will see all component interface connections including the Interrupt Sender and Interrupt receiver interfaces which then can be exported.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Hey,

    thanks a lot for posting the solution! I had the same problem and found your answer here.

    Regards

    Martin