Hiding VHDL code (Black Box)

QXP as source is what you want. This is basically using the Incremental Compilation flow, whereby you export a .qxp on your synthesized design and the other department adds the .qxp file as if it's a source file. The .qxp is a binary, so should be good enough. (It's probably re-workable with HUGE amounts of engineering time, which I assume isn't a concern)

I've seen separate companies integrate their designs into a single FPGA, where it makes sense that they don't share source, and that often ends up in finger-pointing and lots of complaints on both sides. I can't fathom why this would be considered good within a company. That doesn't mean "company politics" have overriding conditions, it just doesn't seem like a good idea. You haven't stated any reason why this extra work is being justified, so it's hard to say.