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Altera_Forum
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11 years agoHI!! help please...Why it gives me this error? I want to put a function of k n
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_signed.all; use ieee.numeric_std.all; entity contador is generic ( k : natural:= 8; n : natural:= LOG2(k+1)--> error (10482): vhdl error at contador.vhd(12): object "log2" is used but not declared ); port ( clock: in std_logic; reset_n: in std_logic; Q : out std_logic_vector (n-1 downto 0) ); end contador; architecture rtl of contador is signal clock,reset_n: std_logic; signal Q_int: std_logic_vector(n-1 downto 0); begin PROCESS(clock, reset_n) begin if (reset_n = '0') then Q_int<= (others => '0'); elsif ((clock'event) and (clock = '1')) then if (Q_int<k) then Q_int <= Q_int + 1; else Q_int<= (others => '0'); end if; end if; end process; Q <= Q_int; end rtl;