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I need help understanding how to use a FIFO in VHDL. If I am inside a process and I want to put two bits serially into a FIFO, how is that done?
I need to set the FIFO clock enable high, the write signal high, set the input to the FIFO, wait one clock cycle, repeat it again with the second input bit, and then set the clock enable and write signal low. But that doesn't make conceptual sense with only having access to combinational logic within the process. I'm also assuming using one-shot multivibrators aren't used...
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A process can communicate with any signal declared in the module. It can't communicate with variables declared in other processes.
I don't know what multivibrators are, nor the one-shot version (not at least in the context of fpga), nor their relation to fifo concept
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