Help importing C in SystemVerilog

Hi,

I'm trying to call C routines in SystemVerilog code using DPI and run into problems. I'm using the free Modelsim edition.

There's a simple example in the Altera Modelsim user manual that i'm trying to compile using MinGW for gcc.

The dll is probably compiled correctly and nm path/name.dll shows the function c_test() I'm trying to export to Modelsim.

Also Modelsim locates it correctly (cause when it doesn't it produces an error message).

But the C function basically does nothing at runtime, it produces no output. When I chank c_task() to return an integer in the output argument I get a 0 and not the integer;

No errors are generated by mingw or modelsim !

Code and process from the modelsim manual below. I only removed the exporting of verilog_task() (replaced it with a printf inside c_task) for simplicity.

Any help appreciated. Thanks.

hello_c.c:# include "svdpi.h"# include "dpiheader.h"

int c_task(int i, int *o)

{

printf("Hello from c_task()\n");

verilog_task(i, o); /* Call back into Verilog */

*o = i;

return(0); /* Return success (required by tasks) */

}

hello.v:

module hello_top;

int ret;

export "DPI-C" task verilog_task;

task verilog_task(input int i, output int o);# 10;

$display("Hello from verilog_task()");

endtask

import "DPI-C" context task c_task(input int i, output int o);

initial

begin

c_task(1, ret); // Call the c task named 'c_task()'

end

endmodule

Compile the Verilog code:

% vlib work

% vlog -sv -dpiheader dpiheader.h hello.v

Compile the DPI code for the Solaris operating system:

% gcc -c -I<install_dir>/include hello_c.c

% gcc -shared -Bsymbolic -o hello_c.so hello_c.o

Simulate the design:

% vsim -c -sv_lib hello_c hello_top -do "run -all; quit -f"# Loading work.hello_c# Loading ./hello_c.so

VSIM 1> run -all# Hello from c_task()# Hello from verilog_task()