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Altera_Forum's avatar
Altera_Forum
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15 years ago

Glitches in I/O signals & PLL implementation

Hi all I am working on a repeater implementation. The code is working fine but am having a grave problem. I am getting some (random) glitches in the output simulations which are even smaller t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Are you using a fully synchronous code? Latches or combinatorial code on the output could create that kind of glitches.

For the pll, is the input clock in the right frequency range? How is the pll's locked output?