glitches in FSM output signals

What kind of glitches? In timing(and in real hardware) everything glitches during a transition. For example, if you have a two registers changing at the same clock edge, the clock will hit them at slightly different times and you will see a "glitch". For example, if going from "00" to "11", you may see 01 or 10 for a few ns. That's life, but it doesn't matter since that glitch goes away before the next clock cycle, and that 01 or 10 is never clocked into the next registers. (You may be seeing a problem glitch where the incorrect value is clocked in, but that's a synchronous design issue.) Not sure if this is what you're talking about, but often something user's mention when going from functional sims to timing sims...