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anilinintel's avatar
anilinintel
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Generation of HDL failed in quartus platform designer

Hi all, when I tried to integrate a custom RTL in platform designer and try to generate HDL . I encountered this error. Error: SoC1: connection (post-transform) is missing a start point: null->ni...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Could you share the design file for investigation?


Thanks

Best regards,

KhaiY


  • anilinintel's avatar
    anilinintel
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Quartus version: Quartus Prime Version 18.1.2 Build 277 02/12/2019 SJ Pro Edition
    patches installed: None

    machine : Red Hat Enterprose linux server 7.3 (maipo)

    Design details : it's nothing, just a nios, jtag uart, ocm of 256 KB and custom RTL file . we reproduced this error in this smaller design.

    custom RTL file : it's a small RAM block with an Avalon interface and also have a custom slave interface IO ports like AVLN_RST,AVLN_CLK, AVLN_EXISTS, AVLN_DATA0, AVLN_DATA1 ,
    AVLN_EXISTS, AVLN_MDATA. This single RTL file was packed well and integrated (in platform designer gui) with nios master ports and custom master interface.


    And while clicking on the generation of HDL after system integrity validation. we end up with the error shown in the original post. we suspect of something like license issue which ended on 25-sept.
    Is it that?

    regards,
    Anil