Altera_ForumHonored Contributor16 years agoGeneration of buffer when taking port as "inout" Hi, I have make simple program as below where a is "input" port,b is "output" port and x is "wire". buf b1(x,a); buf b2(b,x); Here if i take b as "inout" port it i...Show More
Altera_ForumHonored Contributor16 years agoExamine the technology map to see the real FPGA implementation.
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