Forum Discussion

kh12's avatar
kh12
Icon for New Contributor rankNew Contributor
3 years ago

Generating a Simulation File for ATLPLL IP

Hello, I am using the MAX10 dev board. Following instructions for creating the PLL is easy, however as seen in the following document (https://www.ece.ucdavis.edu/~bbaas/180/tutorials/using.a.PLL.pdf...
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi,

ALTPLL does generate .qip and .v files. Both ALTPLL and altera pll got the simulation file generated after the steps and EDA Netlist Writer compilation. The simulation file got the .vo (verilog) and .do files. For ALTPLL simulation setup script, you probably need to generate it through platform designer. Check the folders attached.

Check this document https://www.intel.com/content/www/us/en/docs/programmable/683080/18-1/generating-ip-simulation-files.html probably can help you.

  • Intel® FPGA IP cores that do not require IP functional simulation models for simulation, do not provide the Generate Simulation Model option in the IP core parameter editor.

ALTPLL simulation design examples:

https://www.intel.com/content/www/us/en/docs/programmable/683732/17-0/functional-results-simulate-the-ddr.html

https://www.intel.com/content/www/us/en/docs/programmable/683732/17-0/simulating-the-shift-clk-design-in-the.html

Thanks,

Best Regards,

Sheng

kh12's avatar
kh12
Icon for New Contributor rankNew Contributor
3 years ago

Hello Sheng,

Could you explain what the ALTPLL simulation setup script means? you say .do and .vo simulation files get generated, what is the difference between these and simulation setup scripts?

When I go to ModelSim I am unable to get the simulation to work using the .v file, and putting the .do and .vo files in the simulation project directory also doesnt help.

Let me reframe my question maybe. I am running a design that uses a pll to transform 50 MHz into 40MHz. How can I get the PLL to work on modelsim? which files are needed? this is still unclear to me.