Generated IP cores (.qsys) files in custom ip cores _hw.tcl

Hello,

I have a custom IP core for a Platform Designer Project (Quartus Pro 24.1). The IP core also includes an official Intel FIFO IP core (from core generator)

The original version of the IP core was written for Platform Designer Standard edition. In standard edition the .qsys file for the Intel IP core must be added to the _hw.tcl file.

# 
# file sets
# 
add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
set_fileset_property QUARTUS_SYNTH TOP_LEVEL testmodule
set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
add_fileset_file testmodule.vhd VHDL PATH testmodule.vhd TOP_LEVEL_FILE
add_fileset_file testmodule_fifo.qsys OTHER PATH testmodule_fifo.qsys

When porting this design to Pro Edition, I am not allowed to use this line anymore:

add_fileset_file testmodule_fifo.qsys OTHER PATH testmodule_fifo.qsys

As I understand it correct, I'm supposed to manually add the Intel IP core file (testmodule_fifo.qsys) to the Quartus Project (.qsf).

Is that correct?

Then I end up with the custom IP core file (_hw.tcl) having no references to the generated FIFO IP core. This seems very strange to me, as my understanding of the IP core concept in Platform Designer is, that each IP core comes with all it's requirements and thus is easy to port between different project.

If the information about used generated IP cores is now separated from the custom IP core, I cannot simply include the custom IP core in a different project.

Am I missing something?

Does anybody has a recommendation how to deal with this problem?

thanks

kind reagards

Fabian