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Altera_Forum's avatar
Altera_Forum
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16 years ago

Generated Clocks using TimeQuest

I couldn't find a specific constraints area on the forum so I hope I'm in the right place. I have two clocks that are generated by outputs of a counter. The counter is clocked at 100MHz, a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I've found the problem.

I was using:

fpga_test_ports1|sClockCounter[1]

when I should have been using:

raw_data_capture1|sClockCounter[1]

So my constraints were correct, it was what I was constraining that was incorrect.

To answer the previous post this is a legacy design that I have been asked to make some changes to. The less I touch the better!