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Altera_Forum's avatar
Altera_Forum
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18 years ago

generate clock with Quartus 7.1 web adition

Hello everyone, I'm a new quartus user, and I need to generate a clock with the FPGA. the clock frequency should be 200MHz, and it will drive another device, so it has to be an output. i'm ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Thanks for your reply.

So if I'll take a clock from another device, which is slower, what should I do to connect it to a PLL to generate 200MHz?

Does it matter if the input clock is much slower (about 100-150Hz)?