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Altera_Forum's avatar
Altera_Forum
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10 years ago

generate clock after a specific number

hi! I started to learn VHDL,so be patient :) also my english is poor :cool: but I try to explain my problem: I try to emulate a code for generate (and delay it by a precise integer) the clo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

My project is similar to the PLL (phase locked loop), in fact I want to generate a signal to be send back to a hypothetical "phase frequency detector", then I would be initialized after a time (time that must change in relation to an "integer" value input entity) the clock signal, iterating continually until it various new "integer".

it's for simulation :D

edit: Now I'm using the operating system Ubuntu, as soon as I open windows place the architecture that I tried to make an hour ago. :D