function syntax error for matrix multiplication

respected guiders ...

i have written a vhdl code for matrix multiplication of two matrices. but when i compile the code, i am getting a function syntax error. can anyone help me out of this please...

here is my code. :

package new_type1 is

type matrix_p is array (0 to 7, 0 to 7 ) of BIT ;

end new_type1;

library ieee;

use ieee.std_logic_1164.all;

use ieee.numeric_std.all;

use work.new_type1.all;

entity matrix_mul is

port ( input1 : in matrix_p;

input2 : in matrix_p;

clk : in std_logic;

output1 : out matrix_p );

end matrix_mul;

architecture archi of matrix_mul is

function matmul(a,b : matrix_p) return matrix_p is

begin

for i in 0 to 7 loop

for j in 0 to 7 loop

for k in 0 to 7 loop

ret (i)(j) := ret (i)(j) + (input1(i)(k) * input2(k)(j));

end loop;

end loop;

end loop;

return ret;

end matmul;

begin

output1 <= mat_mul ( input1, input2);

end archi;

please tell me what mistake am doing here ....

thanks in advance :)