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IF you're just getting resource estimations for a block, then simply create a new project containing the block and sub-modules you need to compile it. In the assignments editor, create an assignment for Virtual_pins, and assign it to *. That will then ensure all IOs for that module are assigned virtual pins allowing you to compile your module and get logic usage. You will still need to pick a device - I suggest using the same device as your eventual target.
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Yes you are right. That is exactly what I wanted to do. And later I found out that the full compilation took a very long time and has yet to be successful. I found this message on the console:
Warning (16618): Fitter routing phase terminated due to routing congestion. Congestion details can be found in Chip Planner.
any advice?
Honored Contributor
