1) State-machines are recognized at a high-level, i.e. analyzing a case-statement. The .vqm is a low-level netlist of LUTs/FFs, etc. Quartus can't see the same things. That being said, Synplify should have already done all the necessary state optimizations as well as downstream optimizations that Quartus would have done.
2) I imaging Synplify is doing the Altera one-hot synthesis. The reason this is done is that all registers power-up to 0. "Altera one-hot" just means the first state is all 0s, and so when decoding the lsb, you just invert the decode, i.e. if it's 0 it's active, if it's 1 it's not:
0000
0011
0101
1001
Synplify can't get around the initial state having to be all 0s. So I'm sure it does the same thing.
(So I think Synplify is doing everything you want)