FPGA(Opencl) code work well in emulator mode, but can't finish run on the FPGA

This is a very normal and recurring situation; Altera's emulator has a lot of limitations, first and foremost the fact that it doesn't emulate concurrency/parallelism. When channels are used, it is very likely that if you are not careful enough, your code will block on the FPGA even though it works fine on the emulator.

Debugging the code in this situation is not easy. You can try these steps to see if you can find the problem:

1- Add some counters to your code in the emulator and make sure you are writing the same number of values to every channel, that you are reading from it.

2- Pay attention to the "order" of your channels, try to think of situations that if the channels are reordered, your code may block. It is very likely that this is your problem since the compiler does NOT guarantee channel ordering. Carefully read the "Programming Guide > 1.6.4.5.7 Enforcing the Order of Channel Calls" and try using "mem_fence(CLK_CHANNEL_MEM_FENCE)" to force the order of your channels and see if it fixes the issue.

3- Increasing the depth of channels might help.

4- You can add printf to your OpenCL kernel and run it on the FPGA; even though it will heavily slow down the kernel, it might help you find the channel that is blocking the execution. Try to use a light printf (avoid printing values from the kernel, just print a fixed text to see where it is blocking) to avoid new dependencies.