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UMall1's avatar
UMall1
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Found two LVDS low registers instead of one! (ID: 176067)

I am using an instance of the ALTLVDS_Rx mega function. When I compile my VHDL, I receive the following error:

Error (176067): Found two LVDS low registers instead of one!
Error (176066): Found two LVDS high registers instead of one!
Info (171121): Fitter preparation operations ending: elapsed time is 00:00:01
Error (171000): Can't fit design in device

What does the above error message mean? What is causing it? How do I get around it?

UM

  • The matter has been resolved. Evidently Altera does not allow a single LVDS pair to drive two SERDES receivers. When such a thing happens the above listed errors are thrown.

4 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor

    What are your IP parameters? How are you adding the IP into the design? What are your I/O assignments in the Pin Planner? More detail needed here.

  • UMall1's avatar
    UMall1
    Icon for Occasional Contributor rankOccasional Contributor

    ALTLVDS_RX unit used. Signals - RESET, SIG_IN, CLOCK, SIG_VECTOR_OUT.

    IO ASSIGNMENT: INPUT SIGNAL (SIG_IN) and CLOCK assigned as an LVDS pair using pin planner. Reset is a an asynchronous signal brought in by means of a clock pin/clock network.

  • UMall1's avatar
    UMall1
    Icon for Occasional Contributor rankOccasional Contributor

    The matter has been resolved. Evidently Altera does not allow a single LVDS pair to drive two SERDES receivers. When such a thing happens the above listed errors are thrown.

    • AminT_Intel's avatar
      AminT_Intel
      Icon for Regular Contributor rankRegular Contributor

      I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users