flop-flop simulation in ModelSim

Blue means 1'bZ. We will need to code to understand the problem.

dff code

module dff(clk, din, dout); 
  input clk; 
  input  din; 
  output  dout; 
reg dout; 
 always @ (posedge clk) 
  begin 
   dout <= din; 
end 
endmodule 

module top; 
   reg clk; 
   reg  in_inf; 
   wire  out_inf;
dff D1 (clk, in_inf, out_inf); 
initial // Clock generator
  begin
    clk = 0;
    forever# 10 clk = !clk;
  end
initial //in_inf    
  begin
    in_inf = 0;
   # 28 in_inf = 1;
   # 5 in_inf = 0;
  end
initial    //in_inf    
  begin
    in_inf = 0;
   # 48 in_inf = 1;
   # 5 in_inf = 0;
  end
endmodule 

You should always look sharp at the Modelsim warnings. They tell about problem with reg dout declaration. Must be reg [1:0] dout. Or include reg in the output definition.

whys out_inf[0] is h'x (in the beginning), not zero?

Because you dont have an initial or reset value for them. They wont be assigned a value until the first clock

can i initialize value before first clock?