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Altera_Forum
Honored Contributor
14 years agoHi, I was looking for a code in VHDL that could realize the basic operations (+ - * /).
I tried to use libraries, altera megapack, but always something goes wrong. I am having the same error with simulation in a lot of programs: "Error: Specify valid fractional value for signal "A" from -1.0 to 9.9999999953433871e-001 with multiple value of 4.6566128730773926e-010." The code user cwjcwjcwj post, is taking me to the same error, I'm probably doing something wrong. If someone could help me, I really appreciate! Thank's!