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Altera_Forum
Honored Contributor
Honored ContributorFlattening Verilog Hierarchy for IP block creation
Guys, Wonder if someone could point me in the right direction. I would like to flatten my design hierarchy into 1 file so I can just encrypt that one file for making an IP block. With ove...
Altera_ForumHonored Contributor
Honored Contributorpick your poison...Python, Bash, .bat, Tcl
