Forum Discussion
Altera_Forum
Honored Contributor
14 years agoFlattening Verilog Hierarchy for IP block creation
Guys, Wonder if someone could point me in the right direction. I would like to flatten my design hierarchy into 1 file so I can just encrypt that one file for making an IP block. With ove...
Altera_Forum
Honored Contributor
14 years agoThe brick,
Great Thanks for your help. For some reason I though that would not work :confused: Anyway I think that's me sorted. Thanks for your help (and to the others for replying) C