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Altera_Forum's avatar
Altera_Forum
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14 years ago

Flattening Verilog Hierarchy for IP block creation

Guys, Wonder if someone could point me in the right direction. I would like to flatten my design hierarchy into 1 file so I can just encrypt that one file for making an IP block. With ove...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks for your replies.

Rysc, Yes I am using Ampcrypt. You are correct that there is no need to combine the packages. However, as the design is over 60 files I would rather combine them for an easier IP delivery.

The brick, So are you saying I could encrypt the design and then export a .qxp? I don't want to just encrypt my top level as there is nothing really in there.

Great replies, Thanks for your continued support

C