Fitter and pin placements

Usually the pcb layout contraints are more critical than those imposed by fitter and timing.

Early FPGAs had a few routing resources, so it was recommended running the fitter before finalizing the pin placement. Modern FPGAs have a lot more routing resources and IMHO pin placement is a minor problem; at least I had no such problems in the last 10 years and I always privilege pcb routing. Clearly, it's recommended you follow the basic rules related different i/o banks, consecutive pins, etc. , especially if you use fast switching signals.