Altera_Forum
Honored Contributor
12 years agoFIR filter design for producing bass and treble sound on FPGA (verilog user)
hey,,
i'm currently searching the best way to implement filter between ADC and DAC. this filter will act to filter unnecessary frequency. I would to have bass sound when apply the low pass filter and treble sound for high pass filter. i tried few methods but all didnt work. i tried Fda tool matlab but several verilog code but cant be compiled by quartus like 'real' parameter. so i decide to design filter using megawizard. but, when the block diagram appear. i do not know where should i implement the input, clock,output n etc. i would like to have frequensy sampling of 48000hz, cutoff for low pass filter with 500Hz and 10kHz for high pass filter. do not know how to design..pls help me here :(... i attched the block diagram as u can see the inputs and output involve..tq ya