Finite State Machine..

Info: Command: quartus_map --read_settings_files=on --write_settings_files=off fsm1 -c fsm1 --generate_functional_sim_netlist

Warning: Using design file fsm1.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project

Info: Found design unit 1: fsm1-structural

Info: Found entity 1: fsm1

Info: Elaborating entity "fsm1" for the top level hierarchy

error (10313): vhdl case statement error at fsm1.vhd(19): case statement choices must cover all possible values of expression

error: can't elaborate top-level user hierarchy

error: quartus ii functional simulation netlist generation was unsuccessful. 2 errors, 1 warning

Info: Allocated 167 megabytes of memory during processing

Error: Processing ended: Mon May 05 09:35:49 2008

Error: Elapsed time: 00:00:02