file read and write function fails to execute in functions

I wonder what tool you were using previously - Quartus doesnt support textio at all and never has done (which is very frustrating when the verilog equivalent IS supported, and textio is supported by Xilinx ISE). Its an enhancement request I made 7 years ago!

There are only 3 ways to initialise a ROM/RAM:

1. manually declared array in VHDL

2. Use a .mif file (which can be assigned via attributes or via the assignments editor)

3. Use a function that computes values, like a sin function.

These are the only VHDL supported initialisation methods.

What synthesis tool were you using previously?

I suggest making a mysupport request for this enhancement!