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Altera_Forum
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14 years ago

error:Port "enable" does not exist in primitive "latch" of instance "u0"

When i was simulating my VHDL coding in Quartus II web edition i am getting the following errors: Error:Port "enable" does not exist in primitive "latch" of instance "u0" Error:can't elaborate u...
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Altera_Forum
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14 years ago

Apparently a different entity with the name "latch" but other port names exists in your library.

There's e.g. a latch in altera_primitives_components.vhd. It's better to avoid ambiguous names like this.