"Error: WYSIWYG primitive "mac_mult1" " data port length mismatch

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Hi,

My design is simple but large, with many lpm_mult megafunctions and a few lpm_add_sub megafunctions. On compilation, I am getting this error for Stratix IV:

error: wysiwyg primitive "mac_mult1" has dataa port with specified width of 18, but only 0 bits are connected

Double clicking this error led to a db/mult_n3p.tdf file and theese were highlighted:

mac_mult2 : stratixiv_mac_mult

with (

dataa_width = 18,

datab_width = 18

);

I checked all my mult connections, found some loose ones, fixed them, and am still getting this error.

Can someone please help me out here?

Thanks

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Hi,

can you post how the multiplier is connected to the other blocks in the design ?

Kind regards

GPK

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I have connected my multipliers using buses. Please find one of the multipliers attached as an image.

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Hi,

you are using connection by name. Did you check that the names are the same for source and destination ? I'm not sure whether the names in schematics are case sensitive?

Kind regards

GPK

Aah, there I found. A name for one of the connections had a typo.

Thanks a bunch GPK for the swift help.