Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Error while trying to program EPCS flash in indirect SFL mode

Hi,

On my new CoreEP4CE10 board, I'm able to upload designs successfully in FPGA Ram using JTAG, but I'm unable to program EPCS Flash using JTAG Indirect SFL mode.

Since this board doesn't have an AS connector, I have no other choice to program using SFL, so I decided to try at command-line, but I got same problem :

We can see below that SFLoader is actually succesfully loaded, but then the JTAG hang and the EPCS is not detected.

Question : Are all boards using same FPGA are compatible with those SFL "Factory default enhanced SFL image" provided ? Should I try to make my own loader using SFL Megafunctions ?

Info: *******************************************************************

Info: Running Quartus II 64-Bit Programmer

Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition

Info: Copyright (C) 1991-2013 Altera Corporation. All rights reserved.

Info: Your use of Altera Corporation's design tools, logic functions

Info: and other software and tools, and its AMPP partner logic

Info: functions, and any output files from any of the foregoing

Info: (including device programming or simulation files), and any

Info: associated documentation or information are expressly subject

Info: to the terms and conditions of the Altera Program License

Info: Subscription Agreement, Altera MegaCore Function License

Info: Agreement, or other applicable license agreement, including,

Info: without limitation, that your use is for the sole purpose of

Info: programming logic devices manufactured by Altera and sold by

Info: Altera or its authorized distributors. Please refer to the

Info: applicable agreement for further details.

Info: Processing started: Wed Feb 19 12:11:02 2014

Info: Command: quartus_pgm -m JTAG -o pi;output_files/blinker.jic

Info (213045): Using programming cable "USB-Blaster(Altera) [1-1.3]"

Info (213011): Using programming file output_files/blinker.jic with checksum 0x1A5AF94D for device EP4CE10@1

Info (209060): Started Programmer operation at Wed Feb 19 12:11:03 2014

Info (209016): Configuring device index 1

Info (209017): Device 1 contains JTAG ID code 0x020F10DD

Info (209007): Configuration succeeded -- 1 device(s) configured

Error (209037): JTAG Server can't access selected programming hardware

Error (209012): Operation failed

Info (209061): Ended Programmer operation at Wed Feb 19 12:11:26 2014

Error: Quartus II 64-Bit Programmer was unsuccessful. 2 errors, 0 warnings

Error: Peak virtual memory: 286 megabytes

Error: Processing ended: Wed Feb 19 12:11:26 2014

Error: Elapsed time: 00:00:24

Error: Total CPU time (on all processors): 00:00:00

UPDATE :

Following instruction of the Troubleshooting page (http://www.altera.com/cgi-bin/ts.pl?fn=configuration&hi=2-8), I've manually uploaded the SFL into the FPGA, then I've performed an antodetect again, and I'm unable to see the EPCS, I'm only seeing the FPGA itself. Doing the same at the command-line "jtagconfig" only shows the FPGA where I presume the EPCS should also appear, but it doesn't ... I've check power supply voltages, they look fine ... Is that mean my USB Blaster is defective (but why I'm able to upload FPGA properly) ?
No RepliesBe the first to reply