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Usually you don't want a bulk virtual pin assignment, i.e. clocks are real, perhaps a global reset, etc.
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Even if the clock input to this part of the design is not a real device pin (for example, it's driven by a PLL in the top level of the design), don't use a virtual-pin assignment for it. The Quartus handbook says not to use virtual pins for clocks. There are a few more cases too that don't support virtual pins.
From Volume 2, Section III, Chapter 10:
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Bidirectional, registered I/O pins, and I/O pins with output enable signals cannot be virtual pins.
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Use the following guidelines for creating virtual pins in the Quartus II software:
- Do not declare clock pins
- Nodes or signals that drive physical device pins in the top-level design should not be declared as virtual pins
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